The invention relates to a limiting circuit for a semiconductor transistor and a method for limiting the voltage across a semiconductor transistor, in particular for power semiconductor switches, such as IGBTs, JFETs or MOSFETs.
Power transistors are used as switching elements in inverter systems, for example in high voltage networks of electrical drive systems of motor vehicles. Said power transistors have to have a certain dielectric resistance to voltage peaks that occasionally occur, which, for example, can be caused by leakage inductances in the drive system.
In order to absorb said voltage peaks and to protect the power transistors from damage, limiting circuits (“active clamp”) can be used which temporarily activate the power transistor when electrical surges occur and thereby convert the mostly low-energy voltage peaks into heat via the partially short-circuited power path of the power transistor.
The European patent publication EP 1 110 035 A1 discloses a limiting circuit for a power semiconductor switch, in which a limiting path comprising a plurality of Zener diodes is configured, wherein the reference voltage can be graded by selective bridging of the Zener diodes. Finally, the European patent publication EP 0 730 331 B1 discloses a limiting circuit for a power transistor, in which a voltage divider emits a control signal from the center tap thereof to the gate of the power transistor when an electrical surge occurs, said gate temporarily activating the power transistor.
There is a need for options to limit the voltage over semiconductor transistors effectively, reliably and exactly as possible in order to protect said semiconductor transistors from voltage peaks that might arise.